Measuring Success in Semiconductor Design Optimization, What Metrics Matter?
There are few fields in the world as competitive as semiconductor design exploration and verification. Teams might run tens of millions of compute jobs in a single day on their quest to bring new chips to market first, requiring vast quantities of compute and increasingly, cloud and emulator resources, as well as expensive EDA licenses, and the all-important resource, time. In this roundtable, experts will discuss the license-, job-, compute- and host-based metrics that the world’s leading semiconductor companies measure and tune for, highlighting the optimization strategies that edge out the competition and drive up profitability.
PBS Works Documentation
Documentation for PBS Works Products, including Release Notes, Programmer's Guides, User's Guides, and Administrator's Guides
Altair Hero Datasheet
Designed specifically for hardware emulation environments, Altair Hero™ is an end-to-end, vendor-agnostic solution. It addresses all aspects of emulation flow including design compilation, emulator selection, and software and regression tests.
Altair Hero Demo
Designed specifically for hardware emulation environments, Altair Hero is an end-to-end solution. It addresses all aspects of emulation flow including design compilation, emulator selection, and software and regression tests.
A vendor-independent solution, Hero is capable of managing job scheduling requirements of the Cadence® Palladium®, Mentor Graphics® Veloce® and Synopsys® ZeBu® product families.
Product Overview Videos
Six Smarter Scheduling Techniques for Optimizing EDA Productivity
Semiconductor firms rely on software tools for all phases of the chip design process, from system-level design to logic simulation and physical layout. Given the enormous investment in tools, design talent, and infrastructure, even minor improvements in server farm efficiency can significantly impact the bottom line. As a result, verification engineers and IT managers are constantly looking for new sources of competitive advantage.
Workload management plays a crucial role in helping design teams share limited resources, boost simulation throughput, and maximize productivity. In this paper, we discuss six valuable techniques to help improve design center productivity.
Emulation – Getting a Better Return on Your Investment by Stuart Taylor, Sr Director, Altair
Existing techniques for Emulator usage optimization focus on job packing and gate utilization. While these are useful metrics, they are incomplete.
In this presentation, we show a new product, Hero, that allows for sharing of emulation across multiple teams and optimizes total simulation cycles while maintaining good turn-around times for both Simulation Acceleration and In-Circuit Emulation/Interactive tasks.